supertex inc. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com HV816 features ? 360v pp output voltage for high brightness ? large output load capability of up to 150nf ? 2.7 to 5.5v operating supply voltage ? single lithium ion cell compatible ? adjustable output regulation for dimming ? external switching mosfet ? low audible noise ? output discharge slew rate control ? 1.5v logic ? dedicated enable pin ? two el frequency controls ? independent lamp and converter frequency setting ? split supply capability ? available in 16-lead 4x4 qfn package applications ? laptop keyboards ? netbook keyboards ? display signs ? portable instrumentation equipment ? electronic organizers general description the supertex HV816 is a high voltage electroluminescent (el) lamp driver designed for driving a lamp capacitance of up to 150nf, or an area of approximately 42 square inches. it is comprised of a boost converter followed by an h-bridge. the boost converter produces a regulated output voltage, which is set at a nominal value of 180v using an internal refer - ence voltage. the h-bridge is used to produce a differential output drive and the el lamp will therefore see 180v (360v peak-to-peak). the HV816 has two internal oscillators, one for controlling the boost converter switching frequency and the other for controlling the h-bridge switching frequency. having separate control of each switching frequency allows lexibility in the circuit design. high voltage, dimmable el lamp driver the operating input supply voltage is 2.7 to 5.5v, but the en - able (en) and select (sel) interface to the device will accept logic high levels down to 1.5v. the en input is for turning the device on and off. the sel input is for external logic control of the h-bridge switching frequency, if required. the HV816 boost converter stage uses a single inductor and a minimum number of external components. the input voltage to the inductor can be different from the input voltage to the HV816 (split supply). the external inductor is connected either between the lx and vdd pins or, for split supply applications, between the lx pin and a higher voltage supply (shown as v in in the block diagram). an external mosfet has to be driven by the switch oscillator to generate a high voltage. the switch - ing frequency for this mosfet is set by an external resistor connected between the rsw-osc pin and the supply pin vdd. during operation, the external switching mosfet turns on and allows energy to be stored in the inductor; this energy is trans - ferred into the capacitor c s when the mosfet turns off. the voltage at the cs pin will increase with every switching cycle. once the voltage at the cs pin reaches the desired regulation limit, nominally 180v, the external switching mosfet is turned off to conserve power. the c s capacitor is connected between the cs pin and ground; the cs pin is internally connected to the h-bridge. energy from the boost converter stage is stored in the capacitor before being transferred to the el lamp. depending on the el lamp sizes, a 1.0nf to 15nf capacitor should be used for c s . the el lamp switching frequency can be in the range of 100hz to 1.0khz. this frequency can be set by either an external logic signal at the sel pin, with a frequency that is 4 times the desired el lamp switching frequency, or by an external resis - tor connected between the rel-osc and vdd pins. if external frequency is input to the device at the sel pin, the rel-osc pin should be connected to ground. the HV816 has the provision to control the discharge rate of the output to minimize audible noise emitted by the el lamp, which is connected between the va and vb pins. an external resistor from the rslew-out pin to ground controls the va, vb output discharge rate. el lamp dimming can be accomplished by changing the input voltage to the vreg pin. the vreg pin allows an external voltage source to control the v cs amplitude. the v cs voltage is approximately 143 times the voltage at the vreg pin. downloaded from: http:///
2 HV816 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com fig. 1 : typical application circuit block diagram HV816 es1d r reg = 3.3m r sw = 1.0m r el = 1.0m r slew = 100k on = 1.5v to v dd off = 0v to 0.2v c el 80nf vreg vout vdrive lx gate csva vb en sel vddrel-osc rsw-osc rslew-out gnd hvgnd c fel 100nf c sw 100nf c dd 47 f v dd c in 47 f c g 0.1 f l x = 22 coo dr1030220r v s7820dn v in c s 12nf200v el lamp v sense sel rel-osc vout rslew-out r slew rsw-osc r sw vreg 60pf r reg r el el frequency 2x el frequency 1.26v v ref output drivers v cs v cs va vb c dd device enable vdd lx vdrive gate cs c s c g c in v in d l x v dd en input logic control: on = 1.5v to v dd off = 0 to 0.2v external el frequency control gnd hvgnd HV816 pwm switch oscillator 0 to 88% 7v linear regulator + - downloaded from: http:///
3 HV816 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com -g indicates package is rohs compliant (green)absolute maximum ratings parameter value supply voltage, v dd -0.5 to +7.0v output voltage, v cs -0.5 to +215v junction temperature +125c storage temperature -65c to +150c power dissipation: 16-lead qfn 1.6w absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. pin coniguration product marking 16-lead qfn (k6) sym parameter min typ max units conditions recommended operating conditions v dd supply voltage 2.7 - 5.5 v --- f sw switching frequency 50 - 200 khz --- f el el output frequency 100 - 1000 hz --- s el input for el output frequency 400 - 4000 hz sel = 4* (f el ) and 50% duty cycle r slew output discharge slew rate control resistor 100 - 500 k? --- c el el lamp load capacitance 0 - 150 nf --- t j operating temperature -40 - +85 o c --- 16-lead qfn (k6) (top view) center heat slug is at ground potential. pads are at the bottom of the package. package may or may not include the following marks: si or y = last digit of year sealed w = code for week sealed l = lot number = green packaging h816 ywll csva vb en vout vdd gnd rslew-out rsw-osc rel-osc sel vreg lx gate vdrive hvgnd 1 16 esd sensitive device ordering information part number package packing HV816k6-g 16-lead (4x4) qfn 3000/reel downloaded from: http:///
4 HV816 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com electrical characteristicsdc characteristics (over recommended operating conditions unless otherwise speciied - t j = 25c) sym parameter min typ max units conditions v cs output regulation voltage 160 180 200 v v dd = 2.7 to 5.5v v lamp differential output voltage 320 360 400 v v dd = 2.7 to 5.5v i ddq quiescent v dd supply current - - 2.0 a v dd = 5.5v, en = low i dd input current going into the vdd pin - - 3.0 ma v dd = 2.7 to 5.5v, v in = 5.0v, c el = 80nf, see fig. 1 i in-load input current including inductor currentwith load - - 380 ma v dd = 5.5v, v in = 5.0v, r el = 1.0m, r sw = 1.0m, see fig. 1 i in-noload input current including inductor current without load - - 80 ma v dd = 2.7 to 5.5v, v in = 5.0v no load, see fig. 1 i inq quiescent v in (inductor input voltage) supply current - - 10 a v in = 10v, en = low, see fig. 1 v reg external input voltage range 0 - 1.33 v v dd = 2.7 to 5.5v f el el lamp frequency - 200 - hz r el = 1.0m f sw external mosfet switching frequency - 90 - khz r sw = 1.0m d external mosfet duty cycle - - 88 % --- v ih en, sel logic pins input high level 1.5 - v dd v v dd = 2.7 to 5.5v v il en, sel logic pins input low level 0 - 0.2 v v dd = 2.7 to 5.5v i logic en, sel logic pins high current -1.0 - 1.0 a v dd = 2.7 to 5.5v v gate external mosfet gate voltage - 7.0 - v v dd = 2.7 to 5.5v t gate-rise external mosfet gate voltage rise time - 100 200 ns v dd = 2.7 to 5.5v, c load = 500pf t gate-fall external mosfet gate voltage fall time - - 20 ns v dd = 2.7 to 5.5v, c load = 500pf t va-fall or t vb-fall output fall time - 180 - s c el = 150nf, v cs = 180v, r slew = 100k? r on on-resistance of internal n-channel mosfet at lx pin - - 30 ? guaranteed by design. downloaded from: http:///
5 HV816 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com pin coniguration and external component description pin # pin name description 1 rsw-osc external resistor, r sw , from the rsw-osc to vdd pins sets the switch converter frequency. the switch converter frequency is inversely proportional to the external r sw resistor value. reducing the resistor value by a factor of two will result in increasing the switch converter frequency by two. a c sw capacitor is recommended from rsw-osc to the vdd pin to shunt any switching noise that may couple into the rsw-osc pin. a c sw capacitor with a value of 100nf is typically recommended. 2 rel-osc external resistor, r el , from the rel-osc to vdd pins sets the el frequency. the el frequency is inversely proportional to the external r el resistor value. reducing the resistor value by a factor of two will result in increasing the el frequency by two. the sel pin should be connected to ground if the r el resistor is used to set the el frequency. a c fel capacitor is recommended from the rel-osc to vdd pins to shunt any switching noise that may couple into the rel-osc pin. a c fel capacitor with a value of 100nf is typically recommended. 3 sel external logic signal input to set the el frequency. the rel-osc pin should be connected to ground to use this pin. the output el frequency is ? of the frequency input at this pin. this pin if not used, should be connected to ground. input logic high is 1.5v to v dd . input logic low is 0 to 0.2v. 4 vreg input voltage to set v cs regulation voltage. this pin allows an external voltage source to control the v cs amplitude. the v cs voltage = (143 5%) x v reg . an external resistor, r reg , connected between the vreg and vout pins controls the v cs charging rate. the charging rate is inversely proportional to the r reg resistor value. 5 vout switched internal reference voltage. 6 vdd device low voltage input supply pin. 7 gnd device ground. 8 rslew-out an external resistor, r slew , from this pin to ground controls the slew rate of va and vb output dis - charge. the output discharge slew rate is inversely proportional to the r slew resistor value. the va, vb output discharge time is given by the equation t va-fall or t vb-fall = (r slew x c el ) sec 43.73 9 en enable logic pin to turn the device on/off. input logic high is 1.5v to v dd . input logic low is 0 to 0.2v. 10 va lamp connections. the polarity is irrelevant. the el load capacitance is up to 150nf. 11 vb 12 cs high voltage regulated output. connection for an external high voltage capacitor to ground. a 0.001f to 0.015f 200v capacitor can be used to store the energy transferred from the inductor. 13 hvgnd high voltage ground. connect it to device ground 14 vdrive drive voltage for the gate voltage and also internal regulated voltage for the output drivers. an exter - nal capacitor (c g ) is required at this pin to ground. 15 gate gate control pin for the switching mosfet. connection for an external mosfet. the external mosfet is used to boost the low input voltage by inductive lyback. when the mosfet is on, the inductor is being charged. when the mosfet is off, the charge stored in the inductor will be trans - ferred to the high voltage capacitor c s . the energy stored in the capacitor is transferred to the internal h-bridge, and therefore to the el lamp. in general, low r on mosfets, which can handle more cur - rent, are more suitable to drive larger size lamps. also, a small value inductor should be used. but as the r on value and the inductor value decrease, the switching frequency of the inductor (controlled by r sw ) should be increased to avoid inductor saturation. the inductor input voltage (v in ) is recom - mended to be minimum 4.5v to get the 180v output regulation voltage with 150nf el load. 16 lx drain of the internal n-channel mosfet. the internal mosfet is used to generate the gate pin voltage at startup. downloaded from: http:///
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. supertex inc . does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc . (website: http//www .supertex.com) ?2012 supertex inc. all rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www.supertex.co m 6 HV816 (the package drawing(s) in this data sheet may not relect the most current speciications. for the latest package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-HV816 b032012 16-lead qfn package outline (k6) 4.00x4.00mm body, 1.00mm height (max), 0.65mm pitch symbol a a1 a3 b d d2 e e2 e l l1 dimension (mm) min 0.80 0.00 0.20 ref 0.25 3.85* 2.50 3.85* 2.50 0.65 bsc 0.30 ? 0.00 0 o nom 0.90 0.02 0.30 4.00 2.65 4.00 2.65 0.40 ? - - max 1.00 0.05 0.35 4.15* 2.80 4.15* 2.80 0.50 ? 0.15 14 o jedec registration mo-220, variation vggc-2, issue k, june 2006. * this dimension is not speciied in the jedec drawing. ? this dimension differs from the jedec drawing. drawings not to scale. supertex doc.#: dspd-16qfnk64x4p065, version c041009. seating plane to p v iew side view bottom view a a1 d e d2 e b e2 a3 l l1 vi ew b vi ew b 1 note 3 note 2 note 1(index area d/2 x e/2) note 1(index area d/2 x e/2) 16 1 16 notes: 1. a pin 1 identiier must be located in the index area indicated. the pin 1 identiier can be: a molded mark/identiier; an embedded metal marker; or a printed indicator. 2. depending on the method of manufacturing, a maximum of 0.15mm pullback (l1) may be present. 3. the inner tip of the lead may be either rounded or square. downloaded from: http:///
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